Bug : FreeCAD 0.18 : adjusting transparency on primitive shape causes error

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kisolre
Veteran
Posts: 4159
Joined: Wed Nov 21, 2018 1:13 pm

Re: Bug : FreeCAD 0.18 : adjusting transparency on primitive shape causes error

Post by kisolre »

oldspotty wrote: Fri Jul 19, 2019 11:46 am there is no code in my post,
Code tags. Fifth icon after bold, italic,... </> To make the text look like this:

Code: Select all

CPU
AMD A10-7700K
Cores	4
Threads	4
Name	AMD A10-7700K
Code Name	Kaveri
Package	Socket FM2+ (906)
Technology	28nm
Specification	AMD A10-7700K Radeon R7, 10 Compute Cores 4C+6G
Family	F
Extended Family	15
Model	0
Extended Model	30
Stepping	1
Revision	KV-A1
Instructions	MMX (+), SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4A, AMD 64, NX, VMX, AES, AVX, FMA3, FMA4
Virtualization	Supported, Disabled
Hyperthreading	Not supported
Fan Speed	686 RPM
Stock Core Speed	4000 MHz
Stock Bus Speed	100 MHz
Average Temperature	70 °C
Caches
L1 Data Cache Size	4 x 16 KBytes
L1 Instructions Cache Size	2 x 96 KBytes
L2 Unified Cache Size	2 x 2048 KBytes
Cores
Core Speed	Multiplier	Bus Speed	Temperature	Threads
Core 0	3999.1 MHz	x 40.0	100.0 MHz	70 °C	APIC ID: 0
Core 1	3999.1 MHz	x 40.0	100.0 MHz	70 °C	APIC ID: 1
Core 2	3999.1 MHz	x 40.0	100.0 MHz	70 °C	APIC ID: 2
Core 3	3999.1 MHz	x 40.0	100.0 MHz	70 °C	APIC ID: 3


RAM
Memory slots
Total memory slots	4
Used memory slots	2
Free memory slots	2
Memory
Type	DDR3
Size	16384 MBytes
Channels #	Dual
DRAM Frequency	799.8 MHz
CAS# Latency (CL)	9 clocks
RAS# to CAS# Delay (tRCD)	9 clocks
RAS# Precharge (tRP)	10 clocks
Cycle Time (tRAS)	24 clocks
Bank Cycle Time (tRC)	40 clocks
Physical Memory
Memory Usage	48 %
Total Physical	15 GB
Available Physical	7.72 GB
Total Virtual	19 GB
Available Virtual	7.98 GB
SPD
Number Of SPD Modules	2
Slot #1
Slot #2



Motherboard
Manufacturer	ASUSTeK COMPUTER INC.
Model	A88XM-PLUS (FM2+ )
Version	Rev X.0x
Chipset Vendor	AMD
Chipset Model	K15 IMC
Chipset Revision	00
Southbridge Vendor	AMD
Southbridge Model	A88X FCH
Southbridge Revision	2.6
System Temperature	33 °C
BIOS
Brand	American Megatrends Inc.
Version	1601
Date	23/06/2014
Voltage
+5V	5.040 V
+3.3V	3.360 V
+12V	12.000 V
VIN3	0.176 V
VIN4	0.432 V
VCORE	1.440 V
PCI Data
Slot PCI-E
Slot Type	PCI-E
Slot Usage	In Use
Bus Width	32 bit
Slot Designation	PCIEX16_1
Characteristics	3.3V, Shared, PME
Slot Number	0
Slot PCI-E
Slot Type	PCI-E
Slot Usage	Available
Bus Width	32 bit
Slot Designation	PCIEX1_1
Characteristics	3.3V, Shared, PME
Slot Number	1
Slot PCI
Slot Type	PCI
Slot Usage	Available
Bus Width	32 bit
Slot Designation	PCI1
Characteristics	3.3V, Shared, PME
Slot Number	2
Slot PCI-E
Slot Type	PCI-E
Slot Usage	In Use
Bus Width	32 bit
Slot Designation	PCIEX16_2
Characteristics	3.3V, Shared, PME
Slot Number	3

Operating System
Windows 10 Home 64-bit
Computer type: Desktop
Installation Date: 12/06/2019 02:12:47
Serial Number: ***
Windows Security Center
User Account Control (UAC)	Enabled
Notify level	2 - Default
Windows Update
AutoUpdate	Download Automatically and Install at Set Scheduled time
Schedule Frequency	Every Day
Schedule Time
Windows Defender
Windows Defender	Disabled
Firewall
Firewall	Enabled
Display Name	Bitdefender Firewall
Antivirus
Windows Defender
Antivirus	Disabled
Virus Signature Database	Up to date
Bitdefender Antivirus
Antivirus	Enabled
Virus Signature Database	Up to date
.NET Frameworks installed
v4.8 Full
v4.8 Client
v3.5 SP1
v3.0 SP2
v2.0 SP2
Internet Explorer
Version	11.239.18362.0
PowerShell
Version	5.1.18362.1
Java
Java Runtime Environment
Path	C:\Program Files (x86)\Java\jre1.8.0_211\bin\java.exe
Version	8.0
Update	211
Build	12
oldspotty
Posts: 15
Joined: Thu Jul 18, 2019 11:51 am

Re: Bug : FreeCAD 0.18 : adjusting transparency on primitive shape causes error

Post by oldspotty »

Ok. Done it !
chrisb
Veteran
Posts: 53786
Joined: Tue Mar 17, 2015 9:14 am

Re: Bug : FreeCAD 0.18 : adjusting transparency on primitive shape causes error

Post by chrisb »

Thanks, the name of the button is a bit misleading.
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