[Solved] 0.19pre, DraftWB, weird when Convert wire to B-spline

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fc_tofu
Posts: 653
Joined: Sun Jan 05, 2020 4:56 pm

[Solved] 0.19pre, DraftWB, weird when Convert wire to B-spline

Post by fc_tofu »

version: FreeCAD_0.19.19424_x64_Conda_Py3QT5-WinVS2015, and fc 0.18.4
os: win10x64

Summary:
In DraftWB, newly created wire use first point as position, newly created B-spline user zero as position. "Convert Wire to Bspline" treates them differently.
But when a Bspline gets a non-zero position, it turns out to be a "freak". "Convert" donnot know howto handle it correctly.

Reproduce 1:
1. In DraftWB, draw a wire (polyline) that first point away from zero point.
2. recursively operate the command: Convert wire to B-spline.
3. new wire from the second time using above command is located with a obvious offset from initial position.

Reprodue 2:
1. in DraftWb, draw a B-spline.
2. move it away from initial position with "Move" tool.
3. command "Convert Wire to Bspline"
fsc_2020-02-07_213411.jpg
fsc_2020-02-07_213411.jpg (133.29 KiB) Viewed 1214 times
test.FCStd
(15.38 KiB) Downloaded 36 times
ps.
Tested on 2020-03-13, this bug is removed from latest build:
FreeCAD_0.19.19758_x64_Conda_Py3QT5-WinVS2015
Last edited by fc_tofu on Thu Mar 12, 2020 4:45 pm, edited 5 times in total.
Syres
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Posts: 2893
Joined: Thu Aug 09, 2018 11:14 am

Re: 0.19pre, DraftWB, wierd when Convert wire to B-spline

Post by Syres »

Attached are two updated Python files for you to test. I've tried them on the two builds:

OS: Windows 7 SP 1 (6.1)
Word size of OS: 64-bit
Word size of FreeCAD: 64-bit
Version: 0.19.19424 (Git)
Build type: Release
Branch: master
Hash: 899854ac5d643e991a1006ed75aeff93baf3d224
Python version: 3.6.8
Qt version: 5.12.1
Coin version: 4.0.0a
OCC version: 7.3.0
Locale: English/United Kingdom (en_GB)

and

OS: Windows 7 SP 1 (6.1)
Word size of OS: 64-bit
Word size of FreeCAD: 64-bit
Version: 0.19.19503 (Git)
Build type: Release
Branch: master
Hash: bb189d540cb958e63af44347a244188fae217e93
Python version: 3.6.8
Qt version: 5.12.1
Coin version: 4.0.0a
OCC version: 7.3.0
Locale: English/United Kingdom (en_GB)

The crux of the bug surrounds the makeWire function being triggered from two scenarios, points by Gui interaction and those from a command. In DraftTools.py I've changed approx. line 4491 from:

Code: Select all

                            elif (Draft.getType(self.obj) == 'BSpline'):
                                n = Draft.makeWire(self.Points, self.closed, self.pl)
                            if n:
to:

Code: Select all

                            elif (Draft.getType(self.obj) == 'BSpline'):
                                self.bs2wire = True
                                n = Draft.makeWire(self.Points, self.closed, self.pl, None, None, self.bs2wire)
                            if n:

In Draft.py around line 362 I've changed it from:

Code: Select all

def makeWire(pointslist,closed=False,placement=None,face=None,support=None):
    """makeWire(pointslist,[closed],[placement]): Creates a Wire object
    from the given list of vectors. If closed is True or first
    and last points are identical, the wire is closed. If face is
    true (and wire is closed), the wire will appear filled. Instead of
    a pointslist, you can also pass a Part Wire."""
    if not FreeCAD.ActiveDocument:
        FreeCAD.Console.PrintError("No active document. Aborting\n")
        return
    import DraftGeomUtils, Part
    if not isinstance(pointslist,list):
        e = pointslist.Wires[0].Edges
        pointslist = Part.Wire(Part.__sortEdges__(e))
        nlist = []
        for v in pointslist.Vertexes:
            nlist.append(v.Point)
        if DraftGeomUtils.isReallyClosed(pointslist):
            closed = True
        pointslist = nlist
    if len(pointslist) == 0:
        print("Invalid input points: ",pointslist)
    # print(pointslist)
    # print(closed)
    if placement:
        typecheck([(placement,FreeCAD.Placement)], "makeWire")
        ipl = placement.inverse()
        pointslist = [ipl.multVec(p) for p in pointslist]
    if len(pointslist) == 2: fname = "Line"
to:

Code: Select all

def makeWire(pointslist,closed=False,placement=None,face=None,support=None,bs2wire=False):
    """makeWire(pointslist,[closed],[placement]): Creates a Wire object
    from the given list of vectors. If closed is True or first
    and last points are identical, the wire is closed. If face is
    true (and wire is closed), the wire will appear filled. Instead of
    a pointslist, you can also pass a Part Wire."""
    if not FreeCAD.ActiveDocument:
        FreeCAD.Console.PrintError("No active document. Aborting\n")
        return
    import DraftGeomUtils, Part
    if not isinstance(pointslist,list):
        e = pointslist.Wires[0].Edges
        pointslist = Part.Wire(Part.__sortEdges__(e))
        nlist = []
        for v in pointslist.Vertexes:
            nlist.append(v.Point)
        if DraftGeomUtils.isReallyClosed(pointslist):
            closed = True
        pointslist = nlist
    if len(pointslist) == 0:
        print("Invalid input points: ",pointslist)
    # print(pointslist)
    # print(closed)
    if placement:
        typecheck([(placement,FreeCAD.Placement)], "makeWire")
        ipl = placement.inverse()
        if bs2wire is not True:
            pointslist = [ipl.multVec(p) for p in pointslist]
    if len(pointslist) == 2: fname = "Line"

It will need some serious testing to ensure there aren't regressions caused in other areas.
Attachments
DraftTools.py
(256.68 KiB) Downloaded 27 times
Draft.py
(289.44 KiB) Downloaded 45 times
fc_tofu
Posts: 653
Joined: Sun Jan 05, 2020 4:56 pm

Re: 0.19pre, DraftWB, wierd when Convert wire to B-spline

Post by fc_tofu »

Syres wrote: Fri Feb 07, 2020 3:40 pm Attached are two updated Python files for you to test. I've tried them on the two builds:
...
It will need some serious testing to ensure there aren't regressions caused in other areas.
Thank you, Syres,

I tested you fix on my machine, it worked well.

Hope no regresssion would happen, and I will keep eyes open.
fc_tofu
Posts: 653
Joined: Sun Jan 05, 2020 4:56 pm

Re: 0.19pre, DraftWB, wierd when Convert wire to B-spline

Post by fc_tofu »

Syres wrote: Fri Feb 07, 2020 3:40 pm ...
It will need some serious testing to ensure there aren't regressions caused in other areas.
No regression found on my machine till now.
Hope this fix be tested by more people, and merged into master branch early.

version: FreeCAD_0.19.19510_x64_LP_12.1.2_PY3QT5-WinVS2015
os: win10 x64
fc_tofu
Posts: 653
Joined: Sun Jan 05, 2020 4:56 pm

Re: 0.19pre, DraftWB, weird when Convert wire to B-spline

Post by fc_tofu »

Above fix failed on recent build:
FreeCAD_0.19.19697_x64_Conda_Py3QT5-WinVS2015
Syres
Veteran
Posts: 2893
Joined: Thu Aug 09, 2018 11:14 am

Re: 0.19pre, DraftWB, weird when Convert wire to B-spline

Post by Syres »

fc_tofu wrote: Thu Feb 27, 2020 10:15 am Above fix failed on recent build:
FreeCAD_0.19.19697_x64_Conda_Py3QT5-WinVS2015
Obviously just copying the two files I posted back on Feb 7th will no longer work but the specific changes quoted are still correct taking into account the line numbers are slightly different in Draft.py. I'll submit a PR by Friday night GMT hopefully when I've got a build that's very close to master to make sure everything is still fine.
Syres
Veteran
Posts: 2893
Joined: Thu Aug 09, 2018 11:14 am

Re: 0.19pre, DraftWB, weird when Convert wire to B-spline

Post by Syres »

As promised, PR has been submitted https://github.com/FreeCAD/FreeCAD/pull/3115 after re-test using:

OS: Windows 7 SP 1 (6.1)
Word size of OS: 64-bit
Word size of FreeCAD: 64-bit
Version: 0.19.19747 (Git)
Build type: Release
Branch: master
Hash: 8533527af90d58ec5cd0c6e1a2477ca224022874
Python version: 3.6.8
Qt version: 5.12.1
Coin version: 4.0.0a
OCC version: 7.3.0
Locale: English/United Kingdom (en_GB)
fc_tofu
Posts: 653
Joined: Sun Jan 05, 2020 4:56 pm

Re: 0.19pre, DraftWB, weird when Convert wire to B-spline

Post by fc_tofu »

Syres wrote: Fri Feb 28, 2020 10:55 am As promised, PR has been submitted https://github.com/FreeCAD/FreeCAD/pull/3115 after re-test using:

OS: Windows 7 SP 1 (6.1)
Word size of OS: 64-bit
Word size of FreeCAD: 64-bit
Version: 0.19.19747 (Git)
Build type: Release
Branch: master
Hash: 8533527af90d58ec5cd0c6e1a2477ca224022874
Python version: 3.6.8
Qt version: 5.12.1
Coin version: 4.0.0a
OCC version: 7.3.0
Locale: English/United Kingdom (en_GB)
Well done, thank you.
Syres
Veteran
Posts: 2893
Joined: Thu Aug 09, 2018 11:14 am

Re: [PULLED] 0.19pre, DraftWB, weird when Convert wire to B-spline

Post by Syres »

I completely appreciate English may not be your mother tongue but [PULLED] in England means Removed, Deleted or No Longer Available. Might be best to just have [PR Submitted] as the start of the thread title for the time being.
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